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The purpose of the ASID in a TLB entry is to reduce the size of a process’ page table.

The purpose of the TLB is to speed address translation.

For the same address space size, having smaller pages means you will have smaller page tables.

What will be the first TLB hit with the same TLB size and replacement policy as before?

Sparsely used address spaces are poor candidates for multi-level page tables.

Convert the VA 0x7011 to its PA.

A page table entry holds the virtual page number for a given physical page.

What is the largest VA for this process that will not cause any faults and be in the heap segment?

Recall the initial rules for MLFQ are: If Priority(A) > Priority(B) then A runs If Priority(A) == Priority(B) then A&B run in RR Jobs start at top priority If a job uses its whole time slice then it is demoted These initial rules had several problems and needed to be changed.  What is one problem with these initial rules and the modification that was made to correct for this problem?

For a segment that grows negatively, if a VA’s offset is out-of-bounds then a page fault will occur.