A given circuit has the following paths between flip-flops:…

A given circuit has the following paths between flip-flops: Path 1: 3.1 ns Path 2: 2.9 ns Path 3: 1.1 ns Path 4: 3.3 ns Assuming all flip-flops are in the same clock domain, what is the maximum clock frequency of this circuit ignoring setup & hold times? Specify your answer in MHz rounded to the nearest integer. (e.g.  the answer for 100.4 MHz should just be 100).