Assume the following cache configuration: • Cache Size = 4kB…

Assume the following cache configuration: • Cache Size = 4kB• Cache Line Size = 64B• Address = 32b For the following sequence of memory accesses, identify the index and tag for the specific cache configurations. Note: 0x represents hex notation. If the value is not used enter a zero. Direct-Mapped Memory Address Index Tag 0x7AD78 [index_direct_mapped] [tag_direct_mapped]   4-way Set Associative Memory Address Index Tag 0x7AD78 [index_set_associative] [tag_set_associative]   Fully Associative Memory Address Index Tag 0x7AD78 [index_fully] [tag_fully]