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A truth table with four output functions is given. Function Y3 will be implemented using a 4:16 decoder that has address inputs A3:0 and outputs Y0, Y1, …, Y15.  Which outputs need to be connected to an OR gate to produce function Y3 (do not confuse function Y3 with output Y3 on the decoder)? 

True of False: A combinational circuit does not have state.

A timing diagram is given for inputs to a D Flip-Flop with Enable (active high). What is the value of the Q output of the D Flip-Flop with Enable at time = 15 ns? Assume the delay from inputs changing to output changing is negligible.

Given the following circuit: What function is implemented by Y2?

Given: 110010012  is an 8-bit two’s complement number. What is its value in decimal (ex: “-25”, “45”)

Given: If you were to put this function into the K-map below, what value would go into the square marked S23?

Given: 110001012  is an 8-bit two’s complement number. What is its value in decimal (ex: “-25”, “45”)

Convert 7810 to an 8-bit unsigned binary number (ex: “01101110”)

Given: F(A,B,C).  Which of the following is the minterm of F that corresponds to A=0, B=0, C=1?

Suppose you are working with a logic family that has the following specifications: VDD 1.2 V VIH 0.78 V VIL 0.42 V VOH 0.8 V VOL 0.3 V Suppose the voltage of a signal is 0.5 V.  Select the two statements that are correct (one for the driver and one for the receiver).