Blog

A timing diagram is given for a 3-bit counter. What is the value of the Q0 output at time = 115 ns?  Assume the delay from inputs changing to outputs changing is negligible.

True or False: A Moore machine is a type of finite state machine that uses the current state and the FSM input to determine the outputs.

A state transition table for a finite state machine is given. The clock input is 100 MHz. Suppose the FSM is currently in state S0 and the inputs are AB = 10.  What will the state be after the next clock edge?  What will the output be?

Given: A = 10011101.  What is the result of A LSR 4 (logical shift right)?  Enter your answer in binary (ex: “00110101”).

Given: A finite state machine has 8 states. What is the minimum number of flip-flops required if one-hot encoding is used to encode the state?

A state transition diagram for a finite state machine is given. The clock input is 100 MHz. Suppose the FSM is currently in state S3 and the inputs are AB = 01.  What will the state be after the next clock edge?  What will the output be?

True or False: 32-bit adders are generally faster than 16-bit adders

Given: A finite state machine has 36 states.  What is the minimum number of flip-flops required if binary encoding is used to encode the state?

What does an SRAM use to store a bit value?

Select the statement that best describes SRAM.