Microkernel You are building an OS using a microkernel-based…
Questions
Micrоkernel Yоu аre building аn OS using а micrоkernel-based approach following the principles of the L3 microkernel. The processor architecture you are building this OS for has the following features: A 32-bit hardware address space. Paged virtual memory system (8KB pages) with a processor register called PTBR that points to the page table in memory to enable hardware address translation. A TLB that doesn't support tagging entries with address space IDs A pair of hardware-enforced segment registers (lower and upper bound of virtual addresses) which limit the virtual address space that can be accessed by a process running on the processor. A virtually-indexed physically tagged processor cache. You end up with the following subsystems that each need to be a separate protection domain. A: 2^30 bytes B: 2^30 bytes C: 100 * 2^20 bytes D: 500 * 2^20 bytes E: 1000 * 2^20 bytes F: 2000 * 2^20 bytes These subsystems are packed into two hardware address spaces: protection domains A and B in the first; and protection domains C, D, E, and F in the second. Based on this grouping, answer the following questions. [2 points] There is a context switch from A to B. What does your OS do to facilitate this context switch?
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